1. Field of the Invention
The invention relates to a method and system for enhancing the yield of semiconductor integrated circuit devices.
2. Description of the Related Art
With the rapid increase in the technological level and complexity of semiconductor circuit design, interest in Design For Manufacturability (DFM) is increasing. In particular, the development of a recommended rule for DFM methods is necessary in order to enhance semiconductor yields. The recommended rule has a value calculated from that of a minimum design rule by a predetermined amount.
In detail, the design of the layout of a semiconductor integrated circuit device depends on a minimum design rule value (or ground rule value). The minimum design rule value represents the limit of resolution in current photolithographic processing, and in particular, refers to the minimum space interval, the minimum overlap area or the like between various masks or within a mask used to manufacture the semiconductor integrated circuit device. However, when the related art technology fails to satisfy the minimum design rule value, the yield can only be rapidly enhanced by using a recommended rule value that is slightly higher than the minimum design rule value in the layout design of a semiconductor integrated circuit device.